Bi-stable circuit



3,169,934 Iii-STABLE CIRCUIT Don it. Holcomb, Los Angeles, Calif.,assigner to Hughes Aircraft Company, Culver City, Calif., a corporationof Delaware Fiied June 30, i959, Ser. No. 824,039 Claims. (Cl. 367-88)This invention relates to bi-stable memory devices and, particularly, toa device utilizing diodes having non-linear characteristics to providean alternating signal at either one of two desired phase conditions.

In the prior art, computers have been found to be relatively slow inoperation because of the response times of vacuum tubes, transistors anddiodes. For faster operation, the use of radio frequency signals hasbeen proposed with digital information being represented by differentphases of the signals. In this type of a computer system utilizing highfrequency signals, conventional binary storage elements such asfiip-flop circuits are not applicable. A device which simply andreliably stores phase information in response to an input signal of adesired informational phase would be very valuable to the computer art,and to other arts. A bi-stable device which utilizes elements havingnon-linear characteristics has the advantages that it would operate atvery high frequencies, that it operates with a minimum of delay, andthat it receives energy from its driving source to providearnplification.

It is, therefore, an object of this invention to provide a bi-stablememory device which may be utilized to store phase information incomputers orrother devices operating with radio frequency signals.

It is a further object-of this invention to provide a bi-stable storagedevice which develops an output signal at either a first or a secondphase condi-tion, corresponding in phase to an informational inputsignal. Y

It is a still further object of this invention to provide a bi-stabledevice which utilizes diodes having non-linear characteristics toprovide an alternating signal at either a first or a second phase, eachof which represents a binary state of digital information.

It is another object of this invention to provide a bistable devicewhich provides amplification of `the information signal `from a signalfrom a driving source and develops and sustains an informational signalwhich is at the same frequency or at a desired sub-harmonic frequency ofthe signal from the driving source.

Briefly, this invention is a bi-stable signal generating circuitutilizing elements halving non-linear capacitance characteristics todevelop signals at the same phase and frequency as an informationalsignal applied thereto. The circuit includes a first and a secondreactance circuit each having one end connected to a common junctionpoint with each reactance circuit including a first and a second diodeconnected either in an anode to anode or cathode to cathode arrangementor in a parallel arrangement. A driving source is connected to the otherend of each reactance circuit soy as to supply driving signals thereto,one driving signal being 180 degrees out of phase from the other. Thecommon junction point is connected to an output lead and to a tankcircuit which is tuned tov a desired frequency such as the frequency ofthe driving source. The common point which is maintained at a balancedvoltage state in response to the driving signal is unbalanced when thetank circuit develops voltage oscillations in response to aninformational signal. The informational signal may be applied to thetank circuit prior to the time of applying the signals from the drivingsource to the reactance circuits. The voltage variations developed bythe tank circuit control the reactance cirr. Y. l

cuits to form a negative conductance looking into the reactance circuitsfrom the tank circuit. Current signals flow between the tank circuit andthe reactance circuit and energy is transferred from the driving sourceto the tank circuit tosustain the signal oscillations therein. Thecurrent signals are at a sub-harmonic frequency of the capacitancevariation rate as determined by the tank circuit and at harmonics ofthat sub-harmonic frequency. The current signals develop output voltagesignals at the tuned frequency of the -tank circuit. The signaldeveloped by the tank circuit is in phase with the informational signalwhich may be either at a first phase or a .second phase 180 degrees outof phase Ifrom the first, each phase representative of a binary state ofinformation.

The novel features which are believed to be characteristic of theinvention, both as to its organization and method of operation, togetherwith further objects and advantages thereof, will be better understoodfrom the following tdescription considered in connection with .theaccompanying drawing in which like characters refer to like parts and inwhich:

FIG. l is a schematic circuit diagram of the bi-stable device of thisinvention;

FIG. 2 is a diagram of waveforms for explaining the operation of FIG. lshowing the driving voltage signal, the capacity variation, the totalcurrent signal on the output lead, and the output voltage developed onthe output lead, all as a function of time;

FIG. 3 is a schematic circuit diagram of an additional arrangement of.the diodes to form .the reactance circuits of FIG. 1; and

FIG. 4 is a diagram of capacitance versus voltage showing the variationof capacitance in the reactance circuits of IFIGS. l and 3 with applieddriving voltage.

Referring first to PIG. l which shows a schematic circuit diagram of thebi-stable device in accordance with this invention, the arrangement ofthe elements in the circuit will be explained. A driving source 10 isprovided including a first generator i2 and a second generator 14connected in a push-pull arrangement, with the generators 12 and I4 eachreferenced to ground. The generator 12 is connected to a driving Isignalllead 16 and the generator I4 is connected to a driving signal lead 18to which the generators supply driving signals at the same frequency but180 degrees out of phase from each other as respectively shown by thewaveforms 22 and 24.

The driving signal lead 16 is connected from the generator I2. to afirst variable reactance circuit 2S by way of a' resistor`ll7 and thedriving signal lead 18 is connected from the generator 14 to a secondvariable reactance circuit 34 by Way of a resistor 19. The resistor 17represents the inherent source resistance of the generator 12 and theresistor 19 represents the inherent source resistance of the generator14. The first variable reactance circuit 2S includes diodes 30 and 32and .the second variable reactance circuit 34 includes diodes 36 and 38.The diodes Sil, 32, 36 and 38 have non-linear capacitancecharacteristics and are semiconductor devices, for eX- ample.

The diode 30 has a cathode coupled to the driving signal lead 16 and ananode coupled to an anode of the diode 32 by a lead 33. The cathode ofthe diode 32 is connected to a junction point 40. The diode 36 has acathode connected to the driving signal lead 18 and an anode connectedto an anode of the diode 33 by a lead 37. The diode 33 leach diode.

b actance circuit 28 and 3d are connected anode to anode in FlG. 1, itis to be noted that in one or both of the reactance circuits, the diodesmay be connected cathode to cathode, as will be explained subsequently.

The junction point 4@ is connected to an output lead 42 which, in turn,is connected to one end of a tank circuit ed. The tank circuit 44includes a variable capacitor 46 and a variable inductor coil 48connected in parallel between the output lead 42 and ground; The tankcircuit d4 is tuned to a frequency f and has a suiciently high Q topresent a short circuit to signals at other frequencies. A coil Sil isinductively coupled to the inductor 48, the coil 50 having a smallnumber of turns relative to the turns of the inductor coil 48 so as toprovide a loose coupling thereto. One end of the coil 5@ is grounded andthe other end is connected to a lead 54 which is connected to aninformation source 56 by way of a resistor 53. The information source S6supplies to the tank circuit 44 a binary information signal as shown bya waveform 6i) having a iirst phase condition or a second phasecondition 180 degrees out of phase from the first. As will be explainedsubsequently, the phase of the information signal of the waveform 60determines the phase of the output signal as shown by a waveform i3 onthe output lead 42. The information source 56 may be a source of binaryinformation in a computer which operates by utilizing the phase relationof high frequency signals for transferring and storing binaryinformation, for example.

The diodes of the reactance circuits 28 and 34 may be silicon typesemiconductor diodes whose capacity can be varied in a non-linear mannerby an externally applied bias voltage. As is well known, a semiconductordiode such as the diode 3f) includes three zones, which are a p zone atthe anode of the diode having an abundance of positive carriers, an nzone at the cathode of the diode having an abundance of negativecarriers, and a thin depletion zone which is a junction between the pand 11 zones having relatively few carriers. Depending upon the biascondition, the diode will either conduct current in one direction orWill act as a capacitor varying in capacitance with the appliedpotential. When the potential across the diode is positive on the anodeor the p side of the junction and negative on the cathode or n side ofthe junction, the carriers bridge the depletion zone and form aconducting path. When the potential is reversed from the conductingcondition so that the diode is reverse biased, the carriers are pulledaway from the depletion zone and because the depletion zone is notbridged with carriers, it acts as the plates of a capacitor.

The greater the potential difference applied across th anode and cathodein a reverse bias direction, the farther the carriers are pulled awayfrom the depletion zone and the lower is the capacity of the diode. Asis also Well known, the capacity of the diode when reverse biased variesin a non-linear manner in response to the applied potential. An exampleof diodes which may be utilized in the circuit of this invention areVaricap silicon junction diodes manufactured by Pacic Semiconductors,Inc., Culver City, California.

The diodes of the reactance circuits 28 and 34 develop a bias betweenthe diodes on the leads 33 and 37 which is determined by the amount ofcharge which each diode 3@ and 32 or 36 and 33 has at any instant. Thebias on the lead 33, for example, when the driving signal of waveform 22is at its zero point is approximately the voltage corresponding to thatwhen an equal charge is present in Also, the bias Voltage on the lead 33at the maximum or minimum peak of the driving signal is approximatelyequal to the peak voltage of the driving signal of the waveform 22 andthe peak of the output signal of the waveform 43 impressed on thejunction point 40. As will be discussed, one of the diodes 341 or 32 mayconduct at the peaks of the driving signals if the charge leaks throughthe diode so as to bias into conduction the diode which is decreasing inbias potential and increasing in capacitance. However, except for thisleakage condition, both diodes of each reactance circuit 2S or 34present either an increasing or a decreasing capacitance.

1Referring now to FIG. 1 and also to FIGS. 2 and 4 which respectivelyshow waveforms developed by the circuit of FIG. 1 and the capacitanceVariation of the diodes in the reactance circuit such as 28, theoperation of the circuit of this invention will be explained in furtherdetail. The generator circuit )il develops driving signals of thewaveforms 22 and 24 which are of the same frequency but 180 degrees outof phase from each other to control the reactance circuits 23 and 34.The diodes 30, 32, 36 and 33 are all selected to have similarcharacteristics. As will also be explained, the variable reactancecircuits 2S and 34 respond to the driving signals of the waveforms 22and 24 to provide a capacitance variation at the junction point 40.Also, the variable reactance circuits 23 and 34 substantially cancel outvoltage variations developed by the driving source at the junction point4i) because of leakage current of the diodes 32 and 38. The diagram ofFG. 4 shows a curve 65a and a curve 66a, representing the capacitancevariation of diodes 32 and 38', respectively, in response to the drivingsignal of the waveform 22. The direction of capacitance variation of thecurves 65a and 65a is opposite because the driving signal of thewaveform 22 is applied to the cathode of the diode 3? and to the anodeof the diode 32. The curve 65a has a zero point or a point of conductionof a Voltage 67a and the curve 66a has a zero point or a point ofconduction of a voltage 68a. The curves 65a and 66a are arranged in FIG.4 by aligning the self-bias voltage points for each curve at a commonvoltage so that the capacitance variation of both diodes resulting frompositive and negative alterations of the waveform 22 is relative to thecommon self-bias voltage.

For purposes of explanation, the operation of the circuit will first beexplained when a signal is not applied to the junction point iii fromthe tank current 44. When a positive-going alternation 23 of thewaveform 22 is first impressed on the diodes 3? and 32, the diodes havean equal reverse bias potential and an equal capacitance. As thealternation 23 rises to its peak, in the positive direction, the diode3b decreases in capacitance at a slow rate as shown by the curve 66a ofFIG. 4 or with a small change of capacitance in response to thepotential difference across the diode, and the diode 32 increases incapacitance at a high rate as shown by the curve a or with a largechange of capacitance in response to the potential difference across thediode. This large increase of capacitance of the diode 32. is caused bythe non-linear characteristics of the diode which provide a largecapacitance change for a small voltage change in the region of a smallpotential diderence across the diode in the reverse bias direction. Thediodes also characteristically in the region of a large potentialdifference across a diode have a relatively small capacitance variationfor a similar potential change across the diode in the operating regionof a small potential difference across the diode in the reverse biasdirection. It is to be noted that the charge distribution or self-biasbetween the diodes 3i) and 32 maintains the diode 32 in a reverse biascondition. The large increase of capacitance of the diode 32 causes thecapacitance value looking into the junction point 4@ from the tankcircuit 44 to decrease similar to a waveform 70a when the alternation 23rises in potential. When the alternation 23 falls in potential, thediode 3i) increases in capacitance with a relatively small change ofcapacitance as shown by the curve 66a and the diode 32 decreases incapacitance with a relatively large change of absolute capacitance asshown by the curve 65a. This large decrease of capacitance of the diode.32 causes the capacitance at the junction point 4@ to increase from itslow point similar to the capacitance curve shown by the waveform 70a.

At the same time, a negative-going alternation 25 of the waveform 24 isimpressed on the diode 36. The fall of potential of the alternation 25causes the diode 33 to be reverse biased with a relatively largepotential difference and to have a relatively small capacitance changeof the curve 65a. The diode 36 is reverse biased with a small potentialdifference because of the bias on the lead 37 as determined by thecharge distribution between the diodes 36 and 3S. The small potentialdifference applied across the diode 36, causes the diode 36 to vary witha relatively large capacitance change as shown by the curve 66a. As thealternation 25 falls to its minimum value, the diode 38 decreases incapacitance with a small change of capacitance and the diode 36increases in capacitance with a relatively large change of capacitance,because of the non-linear voltage verses capacitance characteristics ofthe diodes, as discussed above. As the alternation Z rises in potential,the diode 38 increases in capacitance with a relatively small change incapacitance value and the diode 36 decreases in capacitance with arelatively large change in capacitance value as controlled by the chargedistribution between the diodes 36 and 38.

Therefore, during the occurrencev of the alternations 23 and 25, thediode 32 has a relatively large variation in capacitance value and thediode 38 has a relatively small vaniation in capacitance value. Also,the diode 32 has a large capacitance and the diode 3S has a smallcapacitance. Thus, current iiows between the diodes 32 and 33 asindicated by the arrow 35. It is to be noted that the leakage currentbetween the diodes 32 and 3S maintains the junction point 4?substantially at ground potential.

When the alternation 29 is first impressed on the diodes 30 and 32, thediodes have an equal potential across each diode and have an equalcapacitance value at the self-bias voltage of FIG. 4. When thealternation 29 falls in potential, the capacitance of the diode 3i)increases with a relatively large change of capacitance of the curve denand the capacitance of the diode 32 decreases with a relatively srnallchange of capacitance of the curve 65a. When the alternation 29 rises inpotential, the diode 3i? decreases in capacitance with a relativelylarge change of capacitance and the diode 32 increases in capacitancewith a relatively small change of capacitance.

At the same time as the alternation Z9 is impressed on the diode 30, theincrease of potential of a positive alternation 3l of the waveform 2.4-is impressed on the diode 36. The diode 36 decreases in capacitance witha relatively small change of capacitance value of the curve 66a and thediode 38 increases in capacitance with a relatively large change ofcapacitance value of the curve 65a. This relative change of capacitancevalue results from the diode 36 operating close to its forward biasedregion and the diode 33 operating with a large bias in the reversebiased region. The diode 3.5 is thus operating in the region ofcapacitance where a small voltage change results in a relatively largecapacitance change.

When the alternation 3l falls in potential, the diode 36 increases incapacitance witha relatively small change in capacitance of the curve66a and the diode 38 decreases in capacitance with a relatively largechange in capacitance value of the curve 65a. The capacitance developedin response to the alternations 29 and 3l varies in a manner similar tothe waveform 76a. The sum of the capacitance variations from the tworeactance circuits 28 and 34 which combine in series is shown as theunloaded capacitance variation of the Waveform 70a. ln response to thealternations 29 and 31, current flows from the small capacitance of thediode 32 to the large capacitance of the diode 3S opposite to thedirection of the arrow 3S.

It is to be noted that the diode of each reactance circuit which isincreasing in capacitance, as discussed above, in response to thedriving signal of the waveforms 22 and 24 may be biased into conductionat the maximum and minimum peaks of the driving signals.

Now that the balanced operation of the circuit resulting from thedriving signals has been explained, the operation of the circuit will beexplained to develop an output signal on the output lead 42. When theenergy of an information signal of the waveform 6i) is passed throughthe coil 5t) and coupled to the inductor coil 48, the tank circuit 44oscillates at the frequency and phase of the information signal. Theinformation signal of the waveform 6@ is at the same frequency as thedriving signal of the waveforms 22 and 24 and in phase with one or theother of the two driving signals. Thus, in accordance with theinvention, the informational signal of the waveform 60 is in phase withone driving signal or the other, the phase conditions representingbinary information. It is to be noted that the information signal mayalso be at other frequencies, as will be discussed subsequently. Theinformation signal may be of relatively short duration and of a smallamplitude being only required to transfer suiiicient energy to startoscillations of the tank circuit 44. Also, because of the small numberof turns of the coil 50 and the high impedance of the resistor 5S, thereis a very small loss of energy into the information source 56 when thecircuit is maintaining phase information by developing an output signal.

The signal developed by the tank circuit 44 as a result of theinformational signal of the waveform 60 is then impressed through thejunction point 40 to vary the capacitance of the reactance circuits 28and 34, with the driving signals of the waveforms 22 and 24 beingapplied to the reactance circuits after the tank circuit 44 is energizedso as to present a negative impedance condition to the tank circuit 44.Thus, the tank circuit 44 sees a conductance equal or greater inmagnitude and opposite in sign to its own internal shunt conductance.Therefore, energy is supplied to the tank circuit 44 so as to increasethe amplitude of the informational signals and to sustain the outputsignal developed therein as shown by the waveform 43 or a waveform 43aat the second phase condition.

The effect on the reactance circuits 28 and .34 of the signal developedby the tank circuit 44 as a result of the information signal of theWaveform 6@ introduced thereto, will now be explained. When thealternations 23 and Z5 of the driving signals lare impressed on thevariable reactance circuits 23 and 34 with the diodes Sil, 32, 36 and 38acting las capacitors, and a positive-going alternation 45 across thewaveform 43 is impressed on the junction point 49, an unbalanced voltagecondition is developed between the reactance circuits 23 and 34. Thiscondition results in a change of capacitance at the junction point 4d.

ln response to the alternation 4S olf the signal developed by the tankcircuit 44, the bias potential -acro-ss the diodes 3i? and 3.2. isdecreased and the capacitance of these diodes is increased. At the sametime the lbias across `diodes 36 and 33 is increased and theircapacitance is decreased. However, the increase of capacitance of thediodes 3i? `and 32 is greater than the decrease of capacitance of diodes33 'and 35 because the net signal `across diodes 3@ and 32 is decreasedwhile the net signal `across diodes 36 land 3S is increased. Thus,during the alternation 45, an increase of capacitance is present at thejunction point 40, and current flows from the reactance circuits 2S and34 to the tank circuit 44 as shown by `arrow 68.

ln response to an alternation 47 developed by the tank f circuit 44, anincrease of capacitance is developed across the diodes 3@ and 32 yand 4adecrease of capacitance is developed across the diodes 36 and 3S. Theincrease of capacitance across the diodes 34D and 32 is again greaterthan the decrease of capacitance across the diodes 36 and 33 y.becauseof the net signal changes across the pairs of diodes. l-n response tothe negative-going alternation 47, current flows from the junction point46* to the tank circuit 44 as shown by the arrow 68. The capacityincreases across the diodes 3d and 32 in response to the alternations 45and 47 ybecause the bias on the lead 33 decreases while the bias on thelead 37 increases. It is to be noted that the operation of the circuitis similar but opposite if the informational signal applied to the tankcircuit 4d is 18() degrees out of phase from the Waveform 43.

The current signal developed in response to the :alternations 45 and 4'!includes a sub-harmonic of the capacity variation and al-l harmonics ofth-at sub-harmonie. The capacitance variation, Lwhich may be expressedas 2f Where f is the frequency of the driving signals, results in acomposite current signal on the lead ft2. Because the tank circuit d4 istuned to present a high impedance to current signals only at theVfundamental frequency, j, for example, only the fundamental voltagesignal, as shown by the positive alternation d5 of Waveform 43, isdeveloped on the output lead d2.

It is to be again noted that the capacity variation of the Waveform'i'iia develops a negative resistance, which is an average resistanceindependent of time so ias to provide an energy transfer from thegenerator source to the tank circuit 4d, thus developing and sustainingthe desired amplitude of the output signal of the Waveform 43.Therefore, the circuit of FIG. l ampliiies the signal impressed on thetank circuit 4.14. This type of energy transfer is explained in anarticle `by H. Hetiner and G. Wade entitled Gaim Band Width, and NoiseCharacteristics of the Variable Parametric Ampliiier published inJournal of Applied Physics, September 1958.

lTo further understand the circuit of PEG. l a sequence of operation maybe that the driving signals of the `waveforms 22 and 2d are firstdiscontinued or not app-lied to the reactance circuits 2S and 3rd. Asmall amount of energy of the Waveform dil is then introduced into thetank circuit 44 for a short period of time from the information source56 at Ia selected first phase condition. Before this energy in the tankcircuit ld decays to the level of thermal noise, the driving signals ofthe Waveforms 22 `and 24 lare respectively a plied to the reactancec-ircuits 28 and 34 causing a negative resistance to appear yat thejunction point 4i? 4and at the tank circuit 44. The information energyin the tank circuit ld is then amplified in response to the negativeresistance to the saturation level of the tank circuit 44 to develop theoutput signal of the waveform 43, which condition is maintained at theiirst phase condition. if the information energy applied to the tank`circuit is `at ia second phase condition, 180 degrees from the first,then the output signal resultingy from the energy in the tank circuit ddis at ya different phase as shown !by the Waveform 43a.

The circuit of this invention may be utilized to generate output signalsat the fundamental frequency of the driving signals or any harmonic ofthe frequency 2f, which is the frequency of the capacitance variation asdeveloped by the generator circuit liti. Output signals are developer ata desired frequency by changinnr the tuning of the tank circuit i4 `andintroducing informational signals at the tuned frequency. As discussedabove the current signal of the Waveform ida includes a subharmonicfrequency of the capacitance variation rates 2' and harmonics of thatsub-harmonic- Thus, the output signal on the lead may be at thefrequency of the driving signals or subharmonic of the capacitancevariation and may be expressed as:

frequency and would develop only sub-harmonics of f',

i its driving frequency. Thus, single element react-ance circuits onlydevelop signals at a :frequency of Where r1=2 and higher integers.

Referring now to FlG. 3, which shows an alternate arrangement of thecircuit of FiG. l, the invention will be further described. rlfhereactance circuits 23 and 34 are replaced by reactance circuits 72 and$2. The reactance circuit '72 includes a capacitor 73 havingone platecoupled to the lead le and the other plate coupled to the anode of `adiode 74. The diode 7d has its cathode coupled to the junction pointdi?. A capacitor 77 has one plate coupled to the lead lo and the otherplate coupled to a cathode of a diode 78 oy Way of a lead 79. The anodeof the diode '78 is coupled to the junction point dil. Thus, thecapacitor '73 and the diode '74 `are connected in parallel to thecapacitor '77 and the diode 78. The reactance circuit SZ includes acapacitor S3 having one plate coupled to the lead lil and the otherplate coupled to the cathode of a diode dit through a lead 85. Thereactance circuit S2 also includes a capacitor 87 having one platecoupled to the lead i8 and the other plate connected to an anode of adiode $3 through a lead 89. The cathode of the diode t; is connected tothe junction point lill. Thus, capacitor S7 and diode 83 Aare connectedin parallel Withrthe capacitor S3 and the diode 84. It is to lbe notedthat the reactance circuits such as 72 may be arranged with one of theseries of a diode and a capacitor reversed and with the capacitors bothcoupled to the anodes of the diodes. The diode 78 may have its cathodecoupled to the lead lo and its anode coupled to one end of the capacitor77. with the other end of the capacitor 77 coupled to the junction point(it). f

ln operation, the reactance circuits 72 and S2 operate` similar to thereactance circuits 28 and 34, except that a rnuch larger amplitude ofcapacitance variation is generated because the capacitance of eachreactance circuit add in parallel rather than in series. Also thereactance circuits 72 and 82 develop a charge distribution a biasbetween each capacitor and diode instead of 1between two diodes as shownin FIG. l.

For purposes of explanation, the reactance circuits 72 `and 82. willfirst be explained without a signal being impressed on the junctionpoint it? `from the tank circuit dfi. The capacitance variation show-nin FIG. 4 also applies to each reactance circuit of the parallel diodearrangement of FIG. 3 because the self-bias voltages developed on theleads 75 and 79, for example, are equal `as a result of the similarityof the diodes so that the curves 65a and 66a are arranged in FG. 4 witha common self-Ibias voltage. The capacitance increase or decrease of thecurves 65a and 66a is opposite in response to an alternating voltageapplied to the reactanee -circuit 72 similar to the circuit of FiG. l,because the signal of the Waveform 22 is applied to the anode of thediode 7d and to the cathode of the diode 7S. When the alternation Z3 isimpressed on the reactance circuit 72, the diode'' is reverse biasedwith a large potential difference and develops a small capacitancechange of the curve 66a. The diode 74 is reverse biased with only asmall potential difference, the reverse bias condition resulting fromthe bias on the lead '75 as determined by the charge distributionbetween the capacitor '73 and the diode 7d. Thus, as the alternation 23rises in potential, the diode 7d has a relatively large increase ofcapacitance value of the curve 65a and the diode 73 has a relativelysmall decrease of capacitance value'of the curve 66a. In response to thefall of potential of the alternation 23, the diode 74 has a relativelylarge decrease of capacitance value of the curve 65a and the diode 7Shas 'a relatively small increase of capacitance value of the curve 66a.The capacitance developed bythe alternation 23 has a shape similar tothe unloaded capacitance of a waveform 64. Because the diodes '74 and'73 are coupled in parallel, the capacitance thereof is combined inparallel. For example, in response to the alternation 23, the diode 78is decreasing in capacitance `and the diode 74 is increasing incapacitance, which capacitance-s are combined in parallel to form acapacitance variation similar to that of the waveform 64. The reactancecircuit SZ varies in capacitance in a similar but opposite manner inresponse to the alternation 25 with the diode 84 having a largercapacitance variation than the diode 88. The increase and decrease oflcapacitance of the reaictance circuits 72 and 82 is cornbined in seriesat the junction point d@ to form Va capacitance variation of thewaveform 64. In response to the alternations 29 and 31, the re-aetancecircuits vary in capacitance in a similar manner except the diodes 7Sand 88 have the largest change of `capacitance value.

The capacitance variation -at the junction point di? is much larger forthe circuit of FIG. V3 Where the diodes are arranged in parallel becausethe current distribution between the -diodes 74 and 78 does not limitthe capacitance developed by each diode. The capacitors such as '73 and'77, for example, operate as biasing capacitors so as to separatelycontrol the capacitance of the diodes '74 and '73. In response to thedriving signals of the waveforms 22 land 24, current passes between the`diodes '74 Iand 78 and between the diodes 84 .and 8d when the diodeshave equal characteristics.

When a signal similar to the waveform S3 is applied to the junctionpoint fit) from the tank circuit 44, current signals flo-w between thereactance circuits 72 and 32 and the tank circuit 44 to present anegative impedance to the tank Icircuit 44, similar to the reactancecircuits of PEG. l. The tank circuit d -is energized prior to applyingthe driving signals to the reactance circuits 72 and 82 similar to thediscussion relative to PEG. l. The total current signal passed on thelead it?. of FiG. 3 includes current signals at the same frequencies lasin FlG. 1. The impedance of the tank circuit 44 at the tuned frequencydevelops an output signal similar to the waveform i3 or 43a except atquadrature relative to the phase of the driving signal such as thelwaveform 22 in response to the current signals. The output signals onthe lead 42 of FG. 3 is `at phase quadrature relative to the drivingsignal because the capacitive peaks of the Waveform 64 occurs at thepeaks of the yalternations of the waveform 22 rather than at the voltageas in FIG. l. The circuit of FIG. 3 is useful, for example, Awhen it isdesired to utilize diodes having a relatively large value ofcapacitance.

Thus, there has been described a bi-stable circuit which may be utilizedto retain phase information at high frequencies in response to `aninformation signal. The device utilizes double diode reactance circuitsso ias to develop an output signal at the same frequency of the drivingsignal or at any desired sub-harmonic of the capacitance variation`frequency which is twice the frequency of the driving signals. Thecircuit transfers energy `from the driving source so that a irst or asecond phase condition may be introduced-from a low amplitude signal.

I claim:

1. A memory circuit for developing ian output signal at `a `desiredfrequency and at a similar phase to that of an informational signal atthe same frequency, said circuit comprising: a source of driving signalsat a selected frequency, reactance means at non-linear reactance vs.voltage characteristics coupled to said source of `driving signals toboth develop therefrom and provide a reactance variation having afrequency of Arepetition twice that of said selected frequency, a tankcircuit coupled to said reacta-nce lmeans Iand resonant at a desiredfrequency of output signal, and an informational source coupled to saidtank circuit rfor applying signals thereto, whereby said tank :circuitiosoillaltes :and applies a potential variation to said reactance meansto develop and maintain an output signal.

2. A circuit comprising: driving means for developing alternatingdriving signals at a first `frequenc variable capacitive means coupledto said driving means for both developing and providing therefrom acapacitance variation at a second frequency twice the frequency of saidlirst frequency, said capacitive means having noneliinear capacitancevs. voltage characteristics, oscillating means coupled to saidcapacitive means and selectively tuned to said rst frequency and to allharmonic frequencies of said rst frequency, and a control source coupledto said oscillating mea-ns to apply a control signal at said firstfrequency and at a desired phase to cause said oscillating means to-oscillate and control said variable capacitance means to receive energyfrom said driving means and thereby develop an output signal at saidfirst frequency and at said desired phase.

3. A bi-stable circuit comprising: source means providing first andsecond `driving signals Iof opposite phase relation and at a selectedfrequency; reactance means having 'nonalinear reactance vs. voltage'characteristics coupled to said source means for both developingtherefrom and providing a reactance variation at twice said selectedfrequency, said reactance means including first and second reactancecircuits each having one end coupled to said source means with eachreactance circuit including series-connected first and second diodeshaving non-linear reactance vs. voltage characteristics; a resonantcircuit having one end coupled to said reactance circuit and tuned tosaid selected frequency; and a source of informational signals at saidselected frequency having a selective rst and second phase and coupledto said resonant circuit, said informational signals controlling saidresonant circuit to generate signals and control said reactance circuitsto present a negative impedance to said resonant circuit, the signalsdeveloped by said reactance circuit being amplified tand sustained atthe selected pha-se and selected yfrequency of said informationalsignal.

4. A circuit for responding to a source of information signals having aselected 'irst and second phase `and a fundamental frequency to developoutput signals at one of said selected phases and at the fundamentalfrequency, said circuit comprising: generator means for developing afirst and second driving signal degrees out of phase from each other andat the fundamental frequency; reactance means having non-linearreactance vs. voltage characteristics coupled to said generator meansfor both developing therefrom `and providing a reactance vari-ation attwice said `fundamental frequency, said reactance means including afirst and second reactance circuit each having a first and a second endwith said first end coupled to said generator means, said reactancecircuits each including a first and a second diode coupled in series andin opposite polarity, said first and second diodes having nondlinearcapacitance vs. voltage characteristics; and a tank circuit 'coupled'between the second end of said reactance circuits and said potentialsource and coupled to said source of information signals, saidinformational signals energizing said tank circuit to develop a voltagevariation to fur-ther control said reactance means to transfer energyfrom said reactance means to said tank circuit so that said tank circuitdevelops the output signals.

5. A circuit comprising: ygenerator means for developing first andsecond driving `signals 180 degrees out of phase from each other Iatrespective first yand second terminals and at a predetermined frequency;reactance means having non-linear reactance vs. voltage characteristicscoupled -to said generator means for both developing therefrom andproviding a reactance variation of twice said predetermined frequency,said reactance means comprising ia irst reactance circuit including afirst and second diode lhaving their anodes coupled together and acathode of said first `diode coupled to said first terminal, and asecond reactance circuit including first and second diodes having theiranodes coupled together and a cathode of said first diode coupled tosaid second terminal, said diodes of said irst and second reactancecircuits having non-lineair capacita-nce vs. voltage characteristics; latank circuit including a capacitor and an induotor each having one endcoupled to the cathodes of each of said second diodes and having theother end coupled to said generator means, said tank circuit being tunedto present a high impedance to signals at said predetermined frequency;and a source of informational signals coupled to said inductor fortransferring informational signals thereto at said predeterminedfrequency, said tank circuit oscillating to `develop voltage signals at`said predetermined frequency for Icontrolling the capacitance of saiddiodes so as to present a negative impedance to said tank circuit tomaintain said vol-tage signals.

6. A circuit comprising: a driving source for providing first and seconddriving signals at the same frequency but at different phases; reactancemeans having non-linear reactance vs. voltage characteristics coupled tosaid `driving lsounce for both developing therefrom and providing areactance variation at twice the driving signal frequency, saidreactance means including a junction point, a first and a secondreactance cincuit each having a non-linear reactance vs. voltagecharacteristic, with one end of each react-ance circuit coupled to saiddriving source for receiving therefrom one of said driving signals andthe other end of each said reactance circuit coupled to said junctionpoint; a tank circuit for developing an output signal coupled betweensaid junction point and said driving source, said tank circuit beingresonant at a desired frequency of said output signal; anda source ofinformational signals selectively having a first phase and a secondphase 18() degrees out of phase from said first phase coupled to saidtank cincuit for energizing said tank circuit to control said reactancecircuits and present a negative impedance to said tank circuit, and todevelop said output signal at the resonant frequency of `said tankcircuit and at the phase of said informational signals.

7. A circuit `for ydeveloping output signals at a phase corresponding toa control signal comprising: a source of alternating driving signalshaving a first and a second tenminal providing respective first andsecond driving signais, said driving signals being at ia firstfrequency; reactance means having non-linear reactance vs. voltagecharacteristics coup-led to said sounce for both developing therefromand providing a reaotance variation at twice said first frequency, saidreactance means including a first reactan'ce circuit having non-linearcapacitance v-s. voltage characteristics and also having a first and asecond end with its `said first end coupled to said first terminal, anda second reactance circuit having non-linear capacitance vs. volt-agecharacteristics and also having a first and a second end with its saidfirst end coupled to said second terminal, said second ends of saidreactarice circuits being coupled to la common point; and 'a tankcircuit coupled between said common point and said source and coupled toa source of control signals at said first frequency and harmonics ofsaid first frequency, said tank circuit being tuned to the sainefrequency as said control sign-als, said tank circuit oscillating inresponse to said controi signals to control the potential at said commonpoint whereby said reactance circuits transfer energy to said tankcircuit to amplify and sustain the oscillation of said tank y'circuitand develop the output signals.

8. A `circuit comprising generator means yfor develop ing first andsecond driving signals 180 degrees out of phase from each other atrespective first andV second outputs; reacts-nce means having non-linearreactance vs. voltage characteristics coupled to said generator meansfor both developing therefrom and providing a reactance variation attwice the frequency of said driving signals, said reactance meanscomprising first and second reactance circuits each including a firstcapacitor and a first diode the latter having non-linear capacitance vs.voltage characteristics, a second capacitor and a second diode thelatter having non-linear capacitance vs. voltage characteristics, withone end of said first capacitor and an anode of said first diode coupledtogether and one end of said second capacitor and the cathode of saidsecond diode coupled together, said other ends of said capacitors insaid first reactance circuit coupled to said first output and said otherends of said capacitors in said second reacta'nce circuit coupled tosaid second output, a cathode end of said first diode and a cathode endof said second diode of said reactance circuits coupled together toprovide a junction point; a tank circuit coupled between said junctionpoint and said generator means and tuned to a desired frequency; and asource of informational signals having a selected first and secondIphase coupled to said tank circuit Afor transferring lenergy thereto,said tank circuit applying voltage oscillations to said junction pointso as 'to control said reactance circuits to develop a negativeimpedance and transfer energy to said tank circuit to amplify andsustain the oscillations of said tank circui-t.

9. A circuit for developing alternating output signals at a preselectedlfrequency and `at a phase corresponding to the phase of controlsignals, said circuit comprising: a first source of alternating signalsat said preselected f-"equency, reactance 4means having non-linearreactance vs. voltage--characteristics coupled to said first source forboth developing therefrom and providing a reactance variation at twicesaid preselected frequency, a tank circuit coupled to said reactancemeans and tuned to said preselected frequency, and a second source ofalternating signals at the same frequency as said first source coupledto said tank circuit for introducing control signals thereto to controls-aid reactance variation and develop alternating output signals at saidpreselected frequency and at the phase of said control signals.

1f). A circuit comprising: source means for providing at one end thereofa first alternating driving signal of a preselected frequency Iand forproviding at the other end thereof a second aiternating driving signalof said preselected frequency and 180 out of phase fnom said firstalternating driving signal; reaotance means having nonlinear reactancevs. voltage characteristics coupled to said source means for hothdeveloping therefrom and providing a reactance variation at twice saidpreselected frequency, lsaid reactance means including first and seconddiodes coupled together to form a first series circuit with one end ofsaid series circuit coupled to said one end of said source means, and.4third and fourth diodes connected together to form la second seriescircuit with one end of said second series circuit coupled to said otherend of said source means, each said diode having a non- Ilinearcapacit-ance vs. voltage characteristic, the other ends of said seriescircuits being connected together to form a junction point; a tankcircuit tuned to said preselected i equency and coupled to said junctionpoint; and a source of control signals at a preselected phase and `atsaid preselected frequency coupled to said tank circuit for energizingsaid tank circuit to develop output signals :at said preselectedfrequency and having the same phase as said control signals.

References Cited in the file of this patent UNITED STATES PATENTS OTHERREFERENCES Publication: Electrical Manufacturing, December 1954, pages33-38, 300 and 302, Voltage-Sensitive Capacitors.

UNITED STATES PATENT OFFICE CERTIFICATE 0F CORRECTION Patent No,I3,109,934 November 51 1963 Don R. Holcomb It is hereby certified thaterror appears in the above numbered patent requiring correction and thatthe said Letters Patent should read as corrected below Column 9, line64, for "at" read having for "having" read at column lO, line 3, for"developing and providing therefrom" read developing therefrom and line67,

providing Signed and sealed this 28th day of April 1964.

(SEAL) Attest:

ERNEST W SWIDER EDWARD J. BRENNER Attesting Officer Commissioner ofPatents

8. A CIRCUIT COMPRISING GENERATOR MEANS FOR DEVELOPING FIRST AND SECONDDRIVING SIGNALS 180* OUT OF PHASE FROM EACH OTHER AT RESPECTIVE FIRSTAND SECOND OUTPUTS; REACTANCE MEANS HAVING NON-LINEAR REACTANCE VS.VOLTAGE CHARACTERISTICS COUPLED TO SAID GENERATOR MEANS FOR BOTHDEVELOPING THEREFROM AND PROVIDING A REACTANCE VARIATION AT TWICE THEFREQUENCY OF SAID DRIVING SIGNALS, SAID REACTANCE MEANS COMPRISING FIRSTAND SECOND REACTANCE CIRCUITS EACH INCLUDING A FIRST CAPACITOR AND AFIRST DIODE THE LATTER HAVING NON-LINEAR CAPACITANCE VS. VOLTAGECHARACTERISTICS, A SECOND CAPACITOR AND A SECOND DIODE THE LATTER HAVINGNON-LINEAR CAPACITANCE VS. VOLTAGE CHARACTERISTICS, WITH ONE END OF SAIDFIRST CAPACITOR AND AN ANODE OF SAID FIRST DIODE COUPLED TOGETHER ANDONE END OF SAID SECOND CAPACITOR AND THE CATHODE OF SAID SECOND DIODECOUPLED TOGETHER, SAID OTHER ENDS OF SAID CAPACITORS IN